Basic CPU Architecture

Basic CPU Architecture

All processors since the humble 8086 operate along similar principles utilise a prefatorial fetch-decode-execute procedure. Before going on to attend at real-world processors like the Pentium and the Athlon and their associated complexities, we will look at BORIS - Beginners Optimised cut down Instruction Set processor.

Beginners Optimised Reduced Instruction Set (BORIS)

The base architecture of BORIS is shown in Figure 1.

The BORIS processor contains all the basic components required for a CPU including:

        Arithmetic and logic social unit (ALU)

        Control Unit

        Timing and control circuits

        Temporary Registers

The Arithmetic and Logic Unit is the die of the Central Processing Unit (CPU), which performs operations such as addition, subtraction and multiplication of integers and bit-wise AND, OR, NOT, XOR and other Boolean operations. The CPUs instruction decode logic determines which particular operation the ALU should perform, the extension of the operands and the destination of the result.

The width in bits of the words which the ALU handles, is usually the homogeneous as that quoted for the processor as a whole whereas its away busses may be narrower. Floating-point operations be usually through by a separate floating-point unit(FPU). Some processors call the ALU for address calculations (e.g. incrementing the program counter (PC)), others have separate logic for this.

The Control Unit is literally in control. It takes its timing from the clock and is responsible for performing the machine-cycle, which is fetch, decode, execute and store. It ensures that instructions and data are retrieved from the right place and that data is stored in the right place. It instructs the ALU as to which arithmetic or logical operations it should perform and carries step to the fore other operations like deciding in which part of the machine-cycle the processor is currently operating.

The internal operation of the CPU is clock and...

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